In this stage we will add following features:
- A 65c22 based parallell port used for two C64 compatible joystick ports.
There might be something for the shift register port on it later on… - A fully developed interrupt handler, with priority based interrupts and a register to R/W a filter for interrupts, so we can limit possible interrups during specific task but still be able to recieve some.
- A complete address decoder with a R/W 4-bank system, allowing us to utilize up to 4 MB RAM.
There will be sockets for 2 512kB RAM chips on the motherboard. The rest will be available on the expansion port. - 3 addressable expansion heders, one dedicated 40 pin header dedicated for a graphics card, one 40 pin header dedicated for a audio card (with separate enable signals for left and right) and one 50 pin header on the bottom side, an true expansion port, with full address access, bus request signals (to be able to implement some fancy DMA expansion boards later) and signals to control address translation system (To be able to utilize the 3 MB extra RAM).
The final parts that will come in stage 3 will be (if nothing changes when we try the stage 2 board out):
- A Compact Flash interface, to be able to store data and read programs from.
- A PS2 interface for both keyboard and mouse.
| Firmware Files | Coming later… |
| Schematics | Schematics |
| Model | STEP |
| Gerber | Gerber |